Naman (Naperville North H.S.)
Mentor: Ted Liu
As scientists attempt to push the limits of luminosities in current Large Hadron Collider experiments, the issue of massive data pileup becomes a major limiting point to making great discoveries in the field of particle physics. In order to deal with this data pileup, it is necessary to make a system that will go far beyond previous high performance computing to be able to make particle tracks in real time with near-zero latency. Fermilab is developing such a system that will use Advanced Telecommunications Computing Architecture (ATCA) Crates as parallel processors for different sectors for the detector. My job this summer was to test the elements of one ATCA crate (Local Bus, Rear Transitional Module (RTM), Full Mesh Backplane). I completed all Local Bus and RTM tests, and continue to make progress on Full Mesh Backplane tests. Showing that the concept can be functional with one crate will bring the system one step closer to being integrated into the LHC.